"systemverilog assertions" Jobs

3 open tech roles matching “systemverilog assertions”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: SystemVerilog, TCL, Python. Every listing is re-checked daily and closed roles are removed.

Showing 3 of 3 results

Etched

Join Etched as a Formal Verification Engineer to drive verification strategies for complex ASIC designs in a fast-paced startup environment.

Etched San Jose Published 3 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space United States - Remote $170k–$250k/yr Published 3 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago
Flexible on stack