Direct from source · No middlemen
65 open positions · Updated 2 months ago
65 Asic roles across 9 companies, most in Other; typical advertised salary $165k
Who is hiring (9 companies)
Role types
Work arrangement: 3 hybrid · 9 on-site · 53 not stated
Advertised salaries: p25 $155k · median $165k · p75 $185k (from 45 disclosed annual salaries, USD)
Counts are open roles Joblaze currently tracks on company career pages for this exact skill/location; salaries are advertised minimums, annual, converted to USD.
Showing 20 of 65 positions
Search with filters →Join SpaceX as a Sr. Hardware Design Engineer to develop high-reliability electronics for the Starlink satellite communication network.
Lead complex silicon projects at SpaceX, developing cutting-edge ASICs for Starlink's global connectivity solutions.
Lead complex silicon projects at SpaceX, developing next-generation ASICs for Starlink's global connectivity solutions.
Lead complex silicon projects at SpaceX, driving the development of next-generation ASICs for Starlink's global connectivity.
Lead complex silicon projects at SpaceX, developing next-generation ASICs for the Starlink network.
Join SpaceX as a Sr. Full Chip Physical Verification Engineer to develop cutting-edge silicon for the Starlink network.
Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.
Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.
Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.
Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.
Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.
Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.
Join SpaceX as an RFIC Engineer to develop next-generation RFICs for national security applications in a fast-paced environment.