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Silicon Validation Engineer, Software

Join Etched as a Silicon Validation Engineer to develop firmware for AI/ML accelerator ASICs in a hands-on, onsite role.

Location
San Jose, United States
Compensation
Not disclosed
Level
mid
Type
full time · On-site

Posted by employer 2 weeks ago

First seen on Joblaze 10 hours ago

Last verified on the company career page 10 hours ago

Apply at Etched → Save job Scanned from etched.com

What you'll build

  • Develop low-level validation firmware
  • Drive early bring-up of first silicon
  • Perform deep-dive debug of silicon issues
  • Build firmware infrastructure
  • Develop validation automation frameworks

Must have

  • Proficiency in C/C++ for firmware development
  • Understanding of SoC/computer architecture
  • Solid low-level/embedded fundamentals
  • Knowledge in Linux environments
  • Bachelor's degree in related field

Nice to have

  • 2+ years of experience developing firmware
  • Hands-on experience with silicon bring-up
  • Experience with JTAG and debuggers
  • Experience across pre-silicon and post-silicon environments
  • RTOS experience

Requirements

Experience
2+ years
Education
Bachelor's degree

Not disclosed in this posting: compensation, visa sponsorship.

Benefits

Wellness Benefits Daily Meals Housing Subsidy Unlimited Compute Budget Health Insurance Relocation Assistance

Joblaze summary

The Silicon Validation Engineer at Etched focuses on developing and validating firmware for AI/ML accelerator ASICs throughout their lifecycle, from pre-silicon emulation to post-silicon characterization. Key skills include proficiency in C/C++ for firmware development, an understanding of SoC architecture, and experience with low-level debugging in Linux environments. This role is suited for engineers with a background in embedded systems and at least two years of relevant experience, particularly in silicon bring-up and validation. Etched emphasizes a collaborative environment where engineering and research intersect, fostering a hands-on approach to product development.

Joblaze insights

  • Listed today — first seen on Joblaze September 21, 2026. Last confirmed on Etched's careers page September 21, 2026.
  • Python appears in 48.3% of 453 comparable mid ai/ml roles in United States; SystemVerilog appears in 0.2% of 453 comparable mid ai/ml roles in United States.

Quick facts

Is the Silicon Validation Engineer, Software role remote?
No — this is an on-site role in San Jose, United States.
How much experience is required?
At least 2 years of relevant experience for this Silicon Validation Engineer, Software role.
Where is the role based?
Etched is hiring for this position in San Jose, United States.
What's the tech stack?
Joblaze extracted these technologies from the posting: ASIC, C++, CI/CD, FPGA, JTAG, Linux.
What seniority level is this role?
Etched targets mid-level candidates for this position.
Is this full-time or contract?
Full-time for this Silicon Validation Engineer, Software role at Etched.

From the original posting

Job Summary

We are seeking a skilled and motivated Silicon Validation Firmware Engineer to develop the firmware and low-level software that validates our AI/ML accelerator ASICs across their entire Lifecycle, from pre-silicon emulation and FPGA prototyping through post-silicon bring-up, characterization, and production ramp. In this role you will build the validation firmware, test content, and automation that prove our silicon works, and you will be hands-on debugging real hardware in the lab. Your work directly enables functional correctness, performance, and reliability of our cutting-edge products.

Key Responsibilities

  • Develop and own low-level validation firmware in C/C++ that runs across emulation and physical silicon, providing test content pre-silicon and reusing it to drive post-silicon bring-up.

  • Drive early bring-up of first silicon: boot, initialization, feature enablement, and debug of ASICs.

  • Perform deep-dive debug of silicon issues spanning firmware, RTL, electrical, protocol, and system levels; root-cause and resolve failures.

  • Build firmware infrastructure including hardware abstraction layers (HALs) and low-level device drivers for compute units, memory subsystems, and high-speed interfaces.

  • Develop and extend validation automation, result-capture, and regression frameworks (CI/CD) to run validation at scale.

  • Author firmware-driven test plans and define coverage metrics across IP blocks and subsystems; execute functional, performance, and stress/corner-case testing.

  • Validate and characterize custom IP blocks and accelerator components on both pre- and post-silicon platforms.

  • Use debug consoles and lab tooling (JTAG, UART, logic/protocol analyzers) for silicon debug and characterization.

  • Collaborate closely with design, verification, architecture, DFT, and driver teams to ensure a smooth transition from pre-silicon verification to post-silicon validation, and to feed silicon issues back into revisions and firmware/driver workarounds.

You may be a good fit if you have (Must-have qualifications)

  • Proficiency in C/C++ for firmware and bare-metal development, plus Python for validation automation and scripting.

  • Understanding of SoC/computer architecture (CPU cores, memory subsystems, caches, interconnects).

  • Solid low-level/embedded fundamentals: bootloaders, hardware abstraction layers, device drivers, register/interrupt programming, and bare-metal or RTOS environments.

  • Knowledge and familiarity developing and debugging in Linux environments.

  • Strong problem-solving, analytical, and cross-functional collaboration skills across hardware and software teams.

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (Master's a plus).

Strong candidates may also have experience with (Nice-to-have qualifications)

  • 2+ years of experience developing firmware / embedded software for ASICs or SoCs

  • Hands-on experience with silicon bring-up and low-level debug (boot, initialization, root-causing failures across firmware/electrical/protocol layers).

  • Experience with JTAG and debuggers (e.g., Lauterbach/GDB) and serial/UART debug consoles.

  • Experience across both pre-silicon (emulation, FPGA, RTL simulation) and post-silicon (lab bring-up, characterization) environments.

  • Experience with one or more high-speed interfaces: PCIe, DDR/LPDDR/HBM, SerDes, or die-to-die / chiplet interconnect.

  • Experience building test/validation automation and regression frameworks (CI/CD).

  • RTOS experience (FreeRTOS, Zephyr, NuttX) or RISC-V firmware development.

  • Familiarity with platform/system firmware (UEFI, ACPI, BMC, BIOS).

  • Ability to read RTL (Verilog/SystemVerilog) and debug in simulation.

  • Hands-on lab instrumentation experience (oscilloscopes, logic/protocol analyzers, BERTs) and signal-integrity awareness.

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2.5k per month for those living within walking distance of the office

  • Daily lunch and dinner in our office

  • Unlimited compute budget subject to ROI justification

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

Standard company text repeated across Etched's postings is omitted here.

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