"system on chip" Jobs

450 open tech roles matching “system on chip”, taken straight from company career pages — not reposted from other job boards. Every listing is re-checked daily and closed roles are removed.

No "system on chip" jobs in Berlin right now — showing "system on chip" jobs in all locations.

Showing 20 of 450 results

Sr. RFIC Design Engineer (RFIC Engineering) Visa

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $165k–$265k/yr Published 2 months ago

DSP QAM Ka-band QPSK APSK

Flexible on stack

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Sr. Engineer - Analog Validation

Join Ambiq as a Senior Analog Validation Engineer to validate and characterize analog subsystems in ultra-low-power SoCs.

Ambiq Austin, Texas, United States Published 3 weeks ago

Post-Silicon Validation ARM Mixed-Signal Validation embedded firmware C/C++

Flexible on stack

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Staff Systems Test Operations Engineer

Join Graphcore as a Staff Systems Test Operations Engineer to build manufacturing test solutions for advanced AI systems.

Graphcore Hsinchu City, Hsinchu City, Taiwan Published 2 months ago

OpenBMC bash Python Linux

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 6 months ago

Verilog AHB ASIC Python System Verilog

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 4 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $170k–$235k/yr Published 4 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 4 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Physical Design Engineer - Block Level, Subsystem Implementation

Own block-level implementation from synthesis through GDSII sign-off as a Physical Design Engineer at a cutting-edge AI hardware startup.

Etched San Jose, United States Published 2 months ago

Cadence Python Perl TCL Synopsys

Flexible on stack

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High-Speed Electro-Optical IC Engineer (RFIC Engineering) Visa

Join SpaceX as a High-Speed Electro-Optical IC Engineer to develop cutting-edge solutions for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 2 months ago

Mixed Signal Circuits Analog Circuits Optical Engineering Electro-Optics Silicon Photonics

Flexible on stack

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DV Intern

Join Etched as a Design Verification intern to validate custom IPs for cutting-edge AI hardware in a collaborative environment.

Etched San Jose, California, United States Published 7 months ago

ASIC Python UVM SystemVerilog SoC

Flexible on stack

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Sr. RFIC Layout Designer (RFIC Engineering) Visa

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects for Starlink's global broadband internet system.

SpaceX Palo Alto, CA $150k–$245k/yr Published 2 months ago

Analog EDA RFIC Python Perl

Flexible on stack

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Sr. RFIC Layout Designer (RFIC Engineering) Visa

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects for Starlink's global broadband internet system.

SpaceX Irvine, CA $140k–$230k/yr Published 2 months ago

Analog EDA RFIC Python Perl

Flexible on stack

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AMS Verification Engineer (RFIC Engineering) Visa

Join SpaceX as an AMS Verification Engineer to develop cutting-edge RFICs for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 4 weeks ago

AMS Verilog-A RFIC Python UVM

Flexible on stack

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Technical Program Manager, Silicon Hybrid Visa

Own the end-to-end execution of custom silicon for AI systems at Anthropic, driving external partnerships and program management.

Anthropic San Francisco, CA | New York City, NY $365k–$435k/yr Published 1 month ago

hardware-software co-design DFT silicon ASIC analog/mixed-signal

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Photonic Layout Engineer Hybrid Visa

Join IonQ as a Photonic Layout Engineer to shape the future of quantum computing through innovative chip design.

IonQ College Park, Maryland, United States; Oxford, England, United Kingdom Published 4 weeks ago

quantum computing Python Photonic Integrated Circuit

Flexible on stack

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Firmware Engineer (Taiwan)

Co-develop cutting-edge software for AI models at a startup focused on frontier intelligence in Taipei.

Etched Taipei, Taiwan Published 10 months ago

PCIe DRAM Firmware Embedded Systems AI/ML

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Optical Systems Engineer

Join Etched as an Optical Systems Engineer to define and implement optical interconnect architecture for next-gen AI accelerator systems.

Etched San Jose, United States Published 4 months ago

Optical systems AI/ML

AI-first team

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RFIC Design Engineer (RFIC Engineering) Visa

Join SpaceX as an RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $125k–$195k/yr Published 2 months ago

Filters vector modulators low noise amplifiers power amplifiers DSP

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RFIC Design Engineer (RFIC Engineering) Visa

Join SpaceX as an RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Redmond, WA $125k–$195k/yr Published 2 months ago

Filters vector modulators low noise amplifiers Mixed-Signal Spread Spectrum

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Tech Director, Post Silicon Validation

Lead the Post Silicon Validation team in Bristol to ensure reliable and efficient silicon validation for AI SoCs.

Graphcore Bristol, UK Published 5 months ago

C++ AI/ML Python Linux

Flexible on stack

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