Join Etched as a Design Verification intern to validate custom IPs for cutting-edge AI hardware in a collaborative environment.
Posted by employer 7 months ago
First seen on Joblaze 1 day ago
Last verified on the company career page 1 day ago
Skills & Technologies
What you'll build
- Ensure custom IPs are robust and silicon-ready
- Collaborate with architects and designers
- Validate correctness and performance
Must have
- Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field
- Familiarity with high-speed digital logic
- Familiarity with verification work and writing test benches
Nice to have
- Familiarity with modern ML and LLM model architectures
- UVM or formal verification experience
- Ability to program with Python or another scripting language
Requirements
- Education
- Bachelor's degree
Not disclosed in this posting: compensation, years of experience, visa sponsorship.
Benefits
Joblaze summary
In the Design Verification intern role at Etched, the intern will focus on validating the performance and correctness of custom IPs for advanced chip designs, collaborating closely with various engineering teams. Key skills include familiarity with high-speed digital logic, ASIC or SoC design concepts, and proficiency in SystemVerilog, UVM, or Python. This position is ideal for students pursuing degrees in electrical or computer engineering, particularly those with a strong technical foundation and a willingness to learn about modern AI technologies. Etched emphasizes a collaborative environment where engineering and research intersect, fostering a hands-on approach to tackling complex verif
Joblaze insights
Quick facts
- Is the DV Intern role remote?
- No — this is an on-site role in San Jose, California, United States.
- Where is the role based?
- Etched is hiring for this position in San Jose, California, United States.
- What's the tech stack?
- Joblaze extracted these technologies from the posting: ASIC, Python, SoC, SystemVerilog, UVM.
- What seniority level is this role?
- Etched targets intern candidates for this position.
- Is this full-time or contract?
- Internship for this DV Intern role at Etched.
From the original posting
Job Summary
As a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with high-speed digital logic
Exposure to ASIC or SoC design concepts
Familiarity with SystemVerilog, UVM, or Python
Familiarity with verification work and writing test benches
Familiarity with physical design flows and tooling
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
UVM or formal verification experience
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
Standard company text repeated across Etched's postings is omitted here.
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