"rtl" Jobs

8 open tech roles matching “rtl”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, SystemVerilog, Perl. Every listing is re-checked daily and closed roles are removed.

Showing 8 of 8 results

Senior DFT Engineer

Join K2 Space as a Senior DFT Engineer to lead DFT architecture for complex mixed-signal SoCs in a high-growth satellite company.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago

Scan low-power DFT LBIST Mixed-Signal RTL

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Senior ASIC Emulation Engineer

Lead the bring-up, deployment, and optimization of pre-silicon emulation platforms in a high-growth satellite company.

K2 Space Seattle, WA $170k–$250k/yr Published 1 month ago

palladium ZeBu Python Veloce Perl

Flexible on stack

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Principal ASIC Design Verification Engineer

Join K2 Space as a Principal ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $190k–$285k/yr Published 2 months ago

C++ Python UVM Perl TCL

Flexible on stack

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Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Seattle, WA $120k–$225k/yr Published 2 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Senior FPGA Prototyping Engineer

Join K2 Space as a Senior FPGA Prototyping Engineer to drive the development of next-gen communications ASICs in a fast-paced environment.

K2 Space Seattle, WA $120k–$225k/yr Published 1 month ago

Oscilloscopes Verilog AMD JTAG Xilinx

Flexible on stack

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Senior ASIC Physical Design Engineer Visa

Join K2 Space as a Senior ASIC Physical Design Engineer to develop advanced SoCs for next-generation satellites.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago

Synopsys ICC2 FinFET CPF UPF DFT

Flexible on stack

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Principal ASIC Physical Design Engineer

Lead the implementation of complex SoCs for next-generation satellite and space systems at a high-growth company.

K2 Space Seattle, WA $190k–$280k/yr Published 2 months ago

FinFET EDA RTL DFT ASIC

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Senior ASIC Design Verification Engineer

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago

Python UVM Perl TCL SystemVerilog

Flexible on stack

Apply →