"on chip networks" Jobs

162 open tech roles matching “on chip networks”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, C++. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 162 results

FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$175k/yr Published 3 months ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

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AMS Verification Engineer (RFIC Engineering) Visa

Join SpaceX as an AMS Verification Engineer to develop cutting-edge RFICs for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 2 weeks ago

AMS Verilog-A RFIC Python UVM

Flexible on stack

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Sr. RFIC Design Engineer (RFIC Engineering) Visa

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $165k–$265k/yr Published 1 month ago

DSP QAM Ka-band QPSK APSK

Flexible on stack

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Sr. RFIC Design Engineer (RFIC Engineering) Visa

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $175k–$280k/yr Published 1 month ago

Filters vector modulators low noise amplifiers Mixed-Signal Spread Spectrum

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 6 months ago

Verilog AHB ASIC Python System Verilog

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $170k–$235k/yr Published 3 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 3 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 3 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Austin, TX, United States Published 2 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$260k/yr Published 2 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 2 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$260k/yr Published 2 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. RFIC Design Engineer (RFIC Engineering) Visa

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Redmond, WA $165k–$270k/yr Published 1 month ago

DSP Ka-band microwave SiGe RFIC

Flexible on stack

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NVIDIA, OEM & Chip Providers Lead

Lead Baseten's relationships and market intelligence across the hardware and chip layer of the compute stack.

baseten San Francisco Published 2 days ago

OEM NVIDIA AI/ML HPC

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Sr DFT Engineer

Join Mythic as a Sr DFT Engineer to implement DFT features on innovative chips in a fast-paced startup environment.

Mythic Bangalore Published 6 months ago

IJTAG Deep Neural Networks Scan DFT MBIST

AI-first team

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RFIC Engineer, AI Satellites (Starmind) Visa

Join SpaceX as an RFIC Engineer to develop next-generation RFICs for AI satellites, enhancing connectivity and performance in space.

SpaceX Bastrop, TX Published 1 month ago

C++ High-Speed Digital Systems ADS custom compute electronics Networking

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Silicon Photonics Design Engineer (RFIC Engineering) Visa

Join SpaceX as a Silicon Photonics Design Engineer to develop cutting-edge optical solutions for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 1 month ago

Mixed Signal Circuits RF ADS Analog COMSOL

Flexible on stack

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Sr Staff /Staff DFT Engineer

Lead end-to-end Design for Testability implementation for complex ASIC/SoC designs at a fast-paced AI startup.

Mythic Bangalore Published 6 months ago

IJTAG Deep Neural Networks Scan DFT ASIC

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Principal Engineer, Power Electronics Hybrid

Join Graphcore as a Principal Engineer to define power delivery architecture for AI computing systems in a hybrid work environment.

Graphcore Milpitas, California, United States Published 2 months ago

Electrical Engineering Power Engineering

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