What's the salary range?

Astranis lists $29–$29 for this role.

What's the tech stack?

Joblaze extracted these technologies from the posting: FPGA, SystemVerilog, TCL, UVM, Verilog, Vivado.

What seniority level is this role?

Astranis targets intern candidates for this position.

Is this full-time or contract?

Internship for this FPGA Intern (Winter 2027) role at Astranis.

FPGA Intern (Winter 2027) at Astranis

Joblaze summary

The FPGA Intern at Astranis will engage in RTL development for FPGA applications, working hands-on with multiple FPGAs and various peripherals. Key skills include proficiency in Verilog/SystemVerilog and experience with high throughput systems, particularly in a fast-paced hardware development environment. This role is ideal for students pursuing degrees in electrical engineering or computer science, offering a chance to tackle complex problems alongside experienced engineers. Astranis emphasizes meaningful contributions from all team members, regardless of their level of experience.

Joblaze insights

Listed yesterday — first seen on Joblaze September 25, 2026. Last confirmed on Astranis's careers page September 25, 2026.
FPGA appears in 2.2% of 552 comparable intern other roles in United States; Vivado appears in 0.2% of 552 comparable intern other roles in United States.

Quick facts

What's the salary range?: Astranis lists $29–$29 for this role.
What's the tech stack?: Joblaze extracted these technologies from the posting: FPGA, SystemVerilog, TCL, UVM, Verilog, Vivado.
What seniority level is this role?: Astranis targets intern candidates for this position.
Is this full-time or contract?: Internship for this FPGA Intern (Winter 2027) role at Astranis.

From the original posting

Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today Astranis satellites provide dedicated, secure networks to highly-sophisticated customers across the globe – large enterprises, sovereign governments, and the US military.

FPGA Intern (Winter 2027)

Internships at Astranis typically last for twelve weeks, and are hourly roles designed for students who are currently enrolled at a four-year university.

As an Intern, you will have an amazing opportunity to work on hard problems — we pride ourselves on giving everyone at Astranis a chance to do meaningful work on challenging projects, no matter their seniority. Many past interns have designed and tested hardware/software that is heading to space on our first satellite, and many of them are now full-time employees at Astranis.

If you have already graduated from a four-year university, please apply to be an Associate Engineer.

Role:

RTL Development for FPGA targeted applications
Work with multiple FPGAs and toolchains
Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs
Write software to interface and test RTL in hardware
Collaborate closely with electrical and software engineers

Requirements:

US Citizenship or Green Card (This is a legal requirement; no exceptions)
Currently pursuing a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent
A passion for hardware development, including working in a fast-paced environment and hands-on design and development
Experience in designing, implementing, and testing high throughput systems implemented on FPGAs
Proficiency with Verilog/SystemVerilog for synthesis
Don't meet them all? Not a problem. Please apply even if you do not meet all these criteria.

Bonus:

Experience with UVM and advanced SystemVerilog verification
Experience with Xilinx FPGAs
Experience with Vivado IDE, TCL
Familiarity with system level estimates and implications of power, thermal, and real estate
Experience with high speed data converters (ADCs, DACs, JESD204B)
Experience with circuit level debugging
Experience with digital communication theory and implementation, such as LDPC implementations
Experience with space-based systems
Experience with modern communication systems (RF, IF/IQ, time/freq domains, modulation)
Experience in at least 1 domain beyond logic design. This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.

The base pay for this position is $29.00 per hour.

Base Hourly Pay

$29—$29 USD

U.S. Citizenship, Lawful Permanent Residency, or Refugee/Asylee Status Required

Astranis SMS Terms of Service

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FPGA Intern (Winter 2027)

FPGA Intern (Winter 2027)

Role:

Requirements:

Bonus:

Astranis SMS Terms of Service

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