Lead verification of FPGA designs for safety-critical applications in portable nuclear microreactors at a pioneering startup.
Posted by employer 1 month ago
First seen on Joblaze 1 month ago
Last verified on the company career page 1 day ago
Requirements
Not disclosed in this posting: compensation, visa sponsorship.
Benefits
Joblaze summary
In this role, the Senior FPGA Verification Engineer at Radiant will focus on leading the verification of FPGA designs critical to the safety and control of portable nuclear microreactors. The position requires expertise in SystemVerilog and UVM methodologies, along with a strong background in functional verification and multi-clock domain designs. Ideal candidates will have over seven years of experience in FPGA verification and a collaborative mindset to work closely with cross-functional teams. Radiant, a startup in the nuclear energy sector, is poised for significant growth as it prepares for the launch of its first commercial reactor.
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Quick facts
From the original posting
Radiant is seeking a Senior FPGA Verification Engineer to add to our Embedded Systems team. You will lead verification of FPGAs used in reactor safety, control, and instrumentation systems, covering safety-critical applications, sensor and actuator handling, and communication systems. This role requires close collaboration with RTL design engineers, hardware engineers, embedded software engineers, and test engineers in a cross-functional setting to ensure designs meet the rigorous demands of controlling and monitoring fission reactors. You will be a key contributor in validating the first commercial reactor design in over 50 years.
Lead verification efforts for FPGA designs using SystemVerilog and UVM/OVM frameworks, from test plan development through coverage closure.
Develop and maintain automated verification testbenches for functional, regression, constrained-random, and edge-case coverage.
Define and execute verification strategies for sensor processing, serial communication, and actuator handling logic.
Collaborate directly with RTL designers and embedded software engineers to identify design intent, resolve bugs, and ensure complete functional coverage.
Recommend new tools and practices to continuously improve the FPGA verification flow.
Contribute to RTL design work as needed.
Bachelor's degree in computer engineering, electrical engineering, or a related field.
7+ years of FPGA verification experience with significant depth in functional verification.
Expert proficiency in SystemVerilog and UVM-based verification methodologies.
Strong understanding of FPGA verification flows — simulation, coverage analysis, and regression management.
Experience verifying multi-clock domain designs.
Familiarity with serial communication protocols such as UART, SPI, and I2C.
Familiarity with Ethernet as well as AXIS and APB buses.
Experience with the Microchip PolarFire SoC platform.
Experience with JASPER or similar verification tool.
Proficiency with Linux and TCL/bash shell scripting.
Excellent documentation skills and demonstrated ability to work in multidisciplinary engineering environments.
Must be willing to work extended hours and weekends as necessary to accomplish our mission.
Must work 100% onsite at El Segundo headquarters.
Stock: Substantial incentive stock plan for all full-time employees.
Daily catered lunch. Free snacks and drinks.
Flexible PTO policy. Remote workday allocation.
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