"rtl" Jobs

160 open tech roles matching “rtl”, taken straight from company career pages — not reposted from other job boards. Every listing is re-checked daily and closed roles are removed.

No "rtl" jobs in Amsterdam right now — showing "rtl" jobs in all locations.

Showing 20 of 160 results

Engineering Lead - Prism Visa

Lead the software development for Prism's parabolic dish product line, overseeing embedded and backend systems.

Northwood Space Torrance, CA Published 2 days ago

C++ RF DSP Go Rust

Flexible on stack

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Sr DFT Engineer

Join Mythic as a Sr DFT Engineer to implement DFT features on innovative chips in a fast-paced startup environment.

Mythic Bangalore Published 6 months ago

IJTAG Deep Neural Networks Scan DFT MBIST

AI-first team

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Architecture Modeling Engineer

Join Mythic as an Architecture Modeling Engineer to develop designs for next-generation AI processors.

Mythic Austin, TX $120k–$225k/yr Published 1 year ago

AI/ML

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Palo Alto, CA $155k–$185k/yr Published 4 months ago

FinFET EDA Makefile ASIC Python

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Austin, TX Published 4 months ago

FinFET EDA RTL Makefile ASIC

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Irvine, CA $145k–$175k/yr Published 5 months ago

FinFET RTL Makefile ASIC Python

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 5 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Product Line Director, Frontend RCA & Coverage

Lead the digital front-end verification vertical at ChipAgents, driving AI-driven RCA and coverage products from problem definition to sales.

ChipAgents San Jose $180k–$450k/yr Published 2 months ago

formal verification lint CDC AI/ML coverage

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 5 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Palo Alto, CA $135k–$175k/yr Published 3 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $210k–$310k/yr Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$300k/yr Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $210k–$300k/yr Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Austin, TX Published 3 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Senior DDR & Execution Validation Engineer

Join Graphcore as a Senior DDR & Execution Validation Engineer to validate advanced memory subsystems for next-gen AI compute platforms.

Graphcore Bengaluru, India Published 2 months ago

C++ Oscilloscopes UART HBM GPIO

Flexible on stack

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Senior NVM Digital Designer

Join Mythic as a Senior Digital Designer to develop next-gen NVM controllers for analog compute-in memory technology.

Mythic Palo Alto, CA Published 4 weeks ago

Behavioral Models RTL NVM Digital Design

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Senior Design Verification Engineer

Join Mythic as a Senior Design Verification Engineer to develop and verify designs for next-generation AI processors.

Mythic Austin, TX $120k–$225k/yr Published 11 months ago

AI/ML analog technology

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Strategic Finance Manager

Lead the financial infrastructure and pricing strategy for ChipAgents, a startup at the intersection of AI and semiconductor design.

ChipAgents San Jose $150k–$200k/yr Published 2 weeks ago

AI/ML Pricing Strategy financial modeling

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Digital Verification Engineer

Join Neuralink as a Digital Verification Engineer to impact the future of brain-computer interfaces.

Neuralink South San Francisco, California, United States $131k–$243k/yr Published 1 month ago

ARM Unix Makefile Python UVM

Flexible on stack

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