"chip level packaging" Jobs
284 open tech roles matching “chip level packaging”, taken straight from company career pages — not reposted from other job boards. Every listing is re-checked daily and closed roles are removed.
Showing 20 of 284 results
Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.
Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.
Join Graphcore as a Staff Power Engineer to design and validate power delivery components for AI computing systems.
Join Graphcore as a Senior Silicon Logical Design Engineer to contribute to high-quality microarchitecture and RTL for AI computing systems.
Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.
Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.
Join Graphcore as a Staff Silicon Logical Design Engineer to deliver high-quality microarchitecture and RTL for AI computing systems.
Design and test critical electronics for high-power satellites at a fast-paced, high-growth company.
Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.
Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.