"silicon engineering" Jobs

1249 open tech roles matching “silicon engineering”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, C++, Linux. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 1249 results

Summer 2027 Silicon Engineering Internship/Co-op Visa

Join SpaceX as a silicon engineering intern to work on custom silicon and hardware for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 2 months ago

C++ Verilog ANSYS COMSOL SPICE

Flexible on stack

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Spring 2027 Silicon Engineering Internship/Co-op Visa

Join SpaceX as a silicon engineering intern to work on cutting-edge chip design and development for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 2 months ago

C++ Verilog ANSYS COMSOL SPICE

Flexible on stack

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Sr. DSP Systems Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. DSP Systems Engineer to develop cutting-edge ASICs for satellite broadband systems.

SpaceX Palo Alto, CA $175k–$280k/yr Published 2 months ago

C++ RF MIMO FPGA ASIC

Flexible on stack

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Sr. DSP Systems Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. DSP Systems Engineer to develop cutting-edge ASICs for satellite broadband systems.

SpaceX Irvine, CA $165k–$265k/yr Published 2 months ago

RF/wireless system design AI/ML FPGA C/C++ ASIC

Flexible on stack AI-first team

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ASIC/SOC DFT Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 months ago

Verilog RTL DFT bash ASIC

Flexible on stack

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ASIC/SOC DFT Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $135k–$175k/yr Published 2 months ago

Verilog UPF RTL DFT ASIC

Flexible on stack

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Site Reliability Engineer — HPC & Automation (Silicon Engineering) Visa

Join SpaceX as a Site Reliability Engineer to enhance the high performance computing infrastructure for Starlink's silicon development.

SpaceX Redmond, WA $125k–$175k/yr Published 3 months ago

Terraform REST API Grafana ANSYS MySQL

Flexible on stack AI-first team

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

SpaceX Irvine, CA $165k–$265k/yr Published 2 weeks ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 5 days ago

Verilog ASIC Python System Verilog SoC

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 2 weeks ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$270k/yr Published 2 weeks ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Applied AI Engineer, Silicon Engineering

Join Etched as an Applied AI Engineer to enhance chip development using AI agents in a hands-on, onsite role.

Etched San Jose Published 3 months ago

C++ Ray Slurm EDA RTL

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 4 months ago

FinFET Scripting ASIC EDA tools physical design

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Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 5 months ago

IC Validator Calibre Makefile ASIC Python

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Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$340k/yr Published 2 months ago

C++ Verilog Siemens Tessent DFT ASIC

Flexible on stack

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FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 2 weeks ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $220k–$355k/yr Published 2 months ago

C++ Verilog Siemens Tessent DFT ASIC

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 4 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Austin, TX Published 1 month ago

FinFET bash ASIC Python Perl

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $210k–$310k/yr Published 4 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

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