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Verilog Jobs

51 open positions · Updated 3 months ago

Average salary (USD/year): 153.2k–238.4k/yr

51 roles Mid 15, Senior 13, Intern 10, Principal 6, Staff 4, Lead 2, Director 1 0–20 yrs experience Austin, TX +21 more Full-time, Internship newest 6 days ago

Also hiring: Python SystemVerilog C++ TCL FPGA C

51 Verilog roles across 15 companies, most in Other; 2% fully remote; typical advertised salary $150k

Who is hiring (15 companies)

SpaceX (18) Ambiq (8) Astranis (6) Etched (4) Graphcore (2)

Role types

Other (44) AI/ML (4) Design (2) Management (1)

Work arrangement: 1 fully remote · 1 hybrid · 11 on-site · 38 not stated

Advertised salaries: p25 $125k · median $150k · p75 $177.5k (from 23 disclosed annual salaries, USD)

Counts are open roles Joblaze currently tracks on company career pages for this exact skill/location; salaries are advertised minimums, annual, converted to USD.

Showing 11 of 51 positions

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ASIC/SOC DFT Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 3 months ago

Verilog RTL DFT bash ASIC

Flexible on stack

FPGA Engineer Hybrid Visa

Join Northwood Space as an FPGA Engineer to design and develop advanced communication systems for satellite missions.

Northwood Space Torrance, CA $100k–$160k/yr Published 3 months ago

C++ Verilog DSP FPGA SoCs Rust

Flexible on stack

Summer 2027 Silicon Engineering Internship/Co-op Visa

Join SpaceX as a silicon engineering intern to work on custom silicon and hardware for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 3 months ago

C++ Verilog ANSYS C COMSOL

Flexible on stack

Spring 2027 Silicon Engineering Internship/Co-op Visa

Join SpaceX as a silicon engineering intern to work on cutting-edge chip design and development for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 3 months ago

C++ Verilog ANSYS C COMSOL

Flexible on stack

Principal DFT Engineer (Silicon Engineering) Visa

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 3 months ago

C++ Verilog Siemens Tessent UPF DFT

Flexible on stack

Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$340k/yr Published 3 months ago

C++ Verilog Siemens Tessent DFT ASIC

Flexible on stack

Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $220k–$355k/yr Published 3 months ago

C++ Verilog Siemens Tessent DFT ASIC

Flexible on stack

American Tech Fellowship Remote

Join the American Tech Fellowship to gain skills in deploying AI software and explore opportunities for full-time roles at Palantir.

Palantir North America Published 1 year ago

TypeScript C++ Labview JavaScript Verilog

Flexible on stack

Manager, ASIC Design Engineering (Starshield Silicon) Visa

SpaceX Hawthorne, CA $190k–$245k/yr Published 6 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 7 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 7 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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