Join Ambiq as a DFT Intern to gain hands-on experience in low power DFT implementation and verification for ultra-low power chips.
Posted by employer 2 days ago
First seen on Joblaze 12 hours ago
Last verified on the company career page 12 hours ago
What you'll build
- Support low power DFT implementation and verification for SoC designs
- Assist with scan insertion and verification for physical design modules
- Assist with MBIST insertion and verification for embedded memories
- Analyze DFT rule checking results and help resolve design issues
- Develop and maintain scripts to automate recurring tasks
Must have
- Currently pursuing a B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field
- Completed coursework in digital logic design
- Familiarity with Verilog, SystemVerilog or VHDL
- Comfortable working in a Linux/UNIX environment
Nice to have
- Experience with industry-standard EDA tools for scan insertion or ATPG
- Basic understanding of DFT concepts such as scan, ATPG, MBIST
- Scripting experience in Tcl, Python, or Shell
- Understanding of low power design concepts
Requirements
- Education
- Bachelor's degree
Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.
Joblaze summary
The DFT Intern at Ambiq will engage in the implementation and verification of design for test (DFT) methodologies for low-power system-on-chip (SoC) designs, focusing on scan and memory built-in self-test (MBIST) processes. Key skills include familiarity with digital design concepts, proficiency in scripting languages like Tcl and Python, and experience with EDA tools. This role is ideal for students pursuing degrees in Electrical or Computer Engineering, particularly those with coursework in digital logic and VLSI design. Ambiq's collaborative environment offers interns the chance to work closely with seasoned engineers on innovative edge AI products.
Joblaze insights
- Listed today — first seen on Joblaze October 3, 2026. Last confirmed on Ambiq's careers page October 3, 2026.
Quick facts
- What's the tech stack?
- Joblaze extracted these technologies from the posting: Python, Shell, SystemVerilog, TCL, VHDL, Verilog.
- What seniority level is this role?
- Ambiq targets intern candidates for this position.
- Is this full-time or contract?
- Internship for this DFT Intern role at Ambiq.
From the original posting
Company Overview
About the Role
We’re looking for a Design for Test (DFT) Intern to join our SoC team and contribute to scan and MBIST implementation and verification for our ultra-low power chips. In this role, you’ll gain hands-on experience with industry standard DFT tools and methodologies, learn how to improve manufacturing test coverage and test quality, and work alongside experienced engineers designing edge AI products. This internship is an excellent opportunity to apply what you’ve learned in class, explore industry-standard tools, and see how your work connects to the technology powering everyday devices.
Responsibilities
As a DFT Intern, you will:
- Support low power DFT implementation and verification for SoC designs
- Assist with scan insertion, scan chain verification for physical design modules
- Assist with MBIST insertion and verification for embedded memories
- Analyze DFT rule checking results and help resolve design and testability issues
- Support test coverage analysis and identify opportunities for coverage improvement
- Develop and maintain scripts (e.g., Tcl, Python, Shell) to automate recurring tasks and improve engineering productivity
- Document methodologies, results, and key learnings, and present progress to your mentor and the broader team
- Collaborate with RTL, DFT, DV, and physical design engineers to debug implementation, coverage, and timing issues
Qualifications
- Currently pursuing a B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field
- Completed coursework in several of the following areas:
- Digital logic design
- VLSI design / ASIC design
- CMOS circuits
- Computer architecture (preferred)
- Familiarity with Verilog, SystemVerilog or VHDL and fundamental digital design concepts such as timing, clocking, reset, and pipelining
- Comfortable working in a Linux/UNIX environment
- Strong analytical, debugging, and problem-solving skills
- Good communication skills and a collaborative mindset
Preferred Qualifications
- Experience (coursework or project or internship) with industry-standard EDA tools for:
- Scan insertion or ATPG
- MBIST, memory repair, or embedded memory testing
- ASIC design, or synthesis
- Basic understanding of DFT concepts such as scan, ATPG, MBIST, fault coverage, and memory repair
- Exposure to industry standard EDA tools
- Scripting experience in Tcl, Python, or Shell for flow automation
- Familiarity with fault models such as stuck-at, transition, bridging, memory faults
- Understanding of low power design concepts such as multiple power domains, retention, or clock gating
Standard company text repeated across Ambiq's postings is omitted here.