"digital asic design" Jobs

100 open tech roles matching “digital asic design”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, C++. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 100 results

SpaceX

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Palo Alto, CA $135k–$175k/yr Published 1 month ago
Flexible on stack
Mythic

Lead end-to-end Design for Testability implementation for complex ASIC/SoC designs at a fast-paced AI startup.

Mythic Bangalore Published 7 months ago
Ambiq

Join Ambiq as a Physical Design Intern to gain hands-on experience in designing ultra low power chips.

Ambiq Singapore Published 2 weeks ago
Ambiq

Join Ambiq as a DFT Intern to gain hands-on experience in low power DFT implementation and verification for ultra-low power chips.

Ambiq Singapore Published 1 week ago
Etched

Join Etched as a Physical Design intern to work on front-end designs in silicon and improve iteration speed to final signoff.

Etched San Jose Published 4 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space United States - Remote $170k–$250k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$260k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$260k/yr Published 2 months ago
Flexible on stack
K2 Space

Join K2 Space as a Principal ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $190k–$285k/yr Published 3 months ago
Flexible on stack
Etched

Join Etched as a DFT Intern to refine DFT flow automation and contribute to chip-level regression in a fast-paced environment.

Etched San Jose Published 6 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 1 week ago
Flexible on stack
Etched

Join Etched as a PCB Layout Engineer to design high-performance PCBs for cutting-edge data center products.

Etched Taipei Published 3 weeks ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Palo Alto, CA $170k–$230k/yr Published 4 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 4 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 4 months ago
SpaceX

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 1 week ago
Flexible on stack
SpaceX

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 4 months ago
Flexible on stack