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Systemverilog Jobs

60 open positions · Updated 1 week ago

Average salary (USD/year): 147.4k–228.5k/yr

60 roles Senior 20, Mid 16, Principal 9, Staff 9, Junior 3, Director 2, Intern 1 1–20 yrs experience Austin, TX +20 more Full-time, Internship newest 1 week ago

Also hiring: Python C++ Verilog UVM TCL VHDL

60 Systemverilog roles across 12 companies, most in Other; typical advertised salary $135k

Who is hiring (12 companies)

K2 Space (16) SpaceX (14) Graphcore (9) Neuralink (6) Ambiq (5)

Role types

Other (54) AI/ML (4) Design (2)

Work arrangement: 6 hybrid · 10 on-site · 44 not stated

Advertised salaries: p25 $125k · median $135k · p75 $170k (from 37 disclosed annual salaries, USD)

Counts are open roles Joblaze currently tracks on company career pages for this exact skill/location; salaries are advertised minimums, annual, converted to USD.

Showing 20 of 60 positions

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Senior FPGA Engineer, Verification

Lead verification of FPGA designs for safety-critical applications in portable nuclear microreactors at a pioneering startup.

Radiant El Segundo, CA Published 1 week ago

FPGA bash UVM TCL SystemVerilog

Flexible on stack

Applications Engineer Hybrid

Join ChipAgents as an Applications Engineer to guide enterprise customers in deploying AI-driven chip design solutions.

ChipAgents San Jose $130k–$350k/yr Published 3 months ago

lint Verilog CDC shell scripting Python

Flexible on stack

Digital IC Design Engineer Intern

Join Neuralink as a Digital IC Design Engineer Intern to work on next-gen chip design for brain-computer interfaces.

Neuralink South San Francisco, California, United States $35–$35/hr Published 10 months ago

C++ Python SystemVerilog

Flexible on stack

Hardware/ Software Co-Design Engineer

Join Neuralink as a Hardware/Software Co-Design Engineer to innovate in brain-computer interface technology.

Neuralink Austin, Texas, United States; South San Francisco, California, United States $151k–$261k/yr Published 6 months ago

C++ AI/ML Rust Python SystemVerilog

Flexible on stack

Analog IC Design and Verification Engineer

Join Neuralink as a senior Analog IC Design and Verification Engineer to innovate in brain-machine interface technology.

Neuralink South San Francisco, California, United States $125k–$291k/yr Published 1 year ago

Verilog-AMS SystemVerilog CMOS

Electrical Engineer, Compute Architecture

Join Neuralink as an Electrical Engineer to design and oversee custom electronics systems for innovative healthcare solutions.

Neuralink Austin, Texas, United States; South San Francisco, California, United States $105k–$175.5k/yr Published 3 months ago

PCIe MIPI Verilog LVDS SLVS-EC

Flexible on stack

Digital Verification Engineer

Join Neuralink as a Digital Verification Engineer to impact the future of brain-computer interfaces.

Neuralink South San Francisco, California, United States $131k–$243k/yr Published 1 month ago

ARM Unix Makefile Python UVM

Flexible on stack

Digital IC Design Engineer

Join Neuralink as a Digital IC Design Engineer to innovate in brain-computer interface technology with a talented team.

Neuralink Austin, Texas, United States; South San Francisco, California, United States $116k–$233.8k/yr Published 3 years ago

C++ RTL Python hardware accelerators SystemVerilog

Flexible on stack

Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Los Angeles, CA $120k–$225k/yr Published 5 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Senior ASIC Design Verification Engineer

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago

Python UVM Perl TCL SystemVerilog

Flexible on stack

Senior FPGA Engineer (TS/SCI)

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Los Angeles, CA $120k–$225k/yr Published 1 month ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Senior ASIC Design Verification Engineer

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space United States - Remote $170k–$250k/yr Published 2 months ago

Python UVM Perl TCL SystemVerilog

Flexible on stack

Senior Flight Software Engineer

Join K2 Space as a Senior Flight Software Engineer to develop software for cutting-edge spacecraft in a fast-paced environment.

K2 Space Seattle, WA $160k–$200k/yr Published 2 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Senior FPGA Prototyping Engineer

Join K2 Space as a Senior FPGA Prototyping Engineer to drive the development of next-gen communications ASICs in a fast-paced environment.

K2 Space Seattle, WA $120k–$225k/yr Published 1 month ago

Oscilloscopes Verilog AMD JTAG Xilinx

Flexible on stack

Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Seattle, WA $120k–$225k/yr Published 2 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Senior FPGA Prototyping Engineer

Join K2 Space as a Senior FPGA Prototyping Engineer to drive the development of next-gen communications ASICs in a fast-paced environment.

K2 Space United States - Remote $120k–$225k/yr Published 1 month ago

Verilog AMD UART JTAG Xilinx

Flexible on stack

Senior ASIC Emulation Engineer

Lead the bring-up, deployment, and optimization of pre-silicon emulation platforms in a high-growth satellite company.

K2 Space Seattle, WA $170k–$250k/yr Published 1 month ago

palladium ZeBu Python Veloce Perl

Flexible on stack

Senior ASIC Emulation Engineer

Join K2 Space as a Senior ASIC Emulation Engineer to lead the deployment and optimization of pre-silicon emulation platforms.

K2 Space United States - Remote $170k–$250k/yr Published 1 month ago

C++ palladium ZeBu Python Veloce

Flexible on stack

Senior Flight Software Engineer

Join K2 Space as a Senior Flight Software Engineer to develop software for cutting-edge spacecraft in a fast-paced environment.

K2 Space Los Angeles, CA $160k–$200k/yr Published 5 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Principal ASIC Design Verification Engineer

Join K2 Space as a Principal ASIC Design Verification Engineer to shape first-generation silicon in a high-growth environment.

K2 Space United States - Remote $190k–$285k/yr Published 2 months ago

C++ Python UVM Perl TCL

Flexible on stack

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