"asic" Jobs

229 open tech roles matching “asic”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, C++. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 229 results

Principal ASIC Package Design Engineer Remote

Lead ASIC package design for high-performance satellites in a fast-paced, remote environment.

K2 Space United States - Remote $200k–$280k/yr Published 1 month ago

FC-BGA mixed-signal SoCs Signal integrity Power Delivery MCM

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 1 month ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$260k/yr Published 3 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$260k/yr Published 3 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 3 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 3 months ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Palo Alto, CA $170k–$230k/yr Published 5 months ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 5 months ago

FinFET Scripting ASIC EDA tools physical design

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 5 months ago

FinFET bash ASIC Python Perl

Flexible on stack

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ASIC Architect, Principal (AI Inference) Remote

Positron AI Remote (United States) Published 3 months ago

AI/ML

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SI/PI Engineer

Join Etched as a Signal Integrity and Power Integrity Engineer to lead high-speed PCB designs in a cutting-edge AI hardware startup.

Etched San Jose Published 6 months ago

Power integrity Cadence Sigrity Signal integrity Electrical Engineering Python

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 5 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 5 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $135k–$185k/yr Published 5 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Advanced Packaging SI/PI Engineer

Join Etched as a Senior Signal & Power Integrity Engineer to optimize electrical performance for cutting-edge AI accelerator platforms.

Etched San Jose Published 2 months ago

Power integrity Cadence Sigrity Signal integrity High Speed Interfaces ASIC

Flexible on stack

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$270k/yr Published 1 month ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Senior ASIC Package Design Engineer

Join K2 Space as a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture for high-performance satellites.

K2 Space Seattle, WA $180k–$260k/yr Published 1 month ago

SIWave FC-BGA ADS MCM HFSS

Flexible on stack

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Senior ASIC Package Design Engineer Remote

Join K2 Space as a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture for high-performance satellites.

K2 Space United States - Remote $180k–$260k/yr Published 1 month ago

SIWave FC-BGA ADS MCM HFSS

Flexible on stack

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Silicon Validation Engineer, Software

Join Etched as a Silicon Validation Engineer to develop firmware for AI/ML accelerator ASICs in a hands-on, onsite role.

Etched San Jose Published 2 months ago

C++ Verilog C CI/CD JTAG

Flexible on stack

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Summer 2027 Silicon Engineering Internship/Co-op Visa

Join SpaceX as a silicon engineering intern to work on custom silicon and hardware for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 3 months ago

C++ Verilog ANSYS C COMSOL

Flexible on stack

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