"asic design" Jobs

220 open tech roles matching “asic design”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, C++. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 220 results

SpaceX

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Design Verification Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$195k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $135k–$210k/yr Published 3 months ago
Flexible on stack
Etched

Drive manufacturing readiness for AI systems at a cutting-edge startup in San Jose.

Etched San Jose Published 3 months ago
Etched

Own the accelerator software for cutting-edge chips at a frontier AI startup in San Jose.

Etched San Jose Published 5 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects for Starlink's global broadband internet system.

SpaceX Redmond, WA $140k–$235k/yr Published 3 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space United States - Remote $170k–$250k/yr Published 4 months ago
Flexible on stack
Ambiq

Join Ambiq as a DFT Intern to gain hands-on experience in low power DFT implementation and verification for ultra-low power chips.

Ambiq Singapore Published 3 weeks ago
Etched

Join Etched as a Post-Silicon Validation Engineer to validate and characterize ASICs for cutting-edge AI/ML hardware.

Etched San Jose Published 1 year ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects supporting U.S. National Security.

SpaceX Hawthorne, CA $140k–$205k/yr Published 3 months ago
Mythic

Lead end-to-end Design for Testability implementation for complex ASIC/SoC designs at a fast-paced AI startup.

Mythic Bangalore Published 7 months ago
Etched

Join Etched as a Design Verification intern to validate custom IPs for cutting-edge AI hardware in a collaborative environment.

Etched San Jose Published 8 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 3 months ago
Flexible on stack
Etched

Lead the development of infrastructure tooling for AI ASICs at a cutting-edge startup in San Jose.

Etched San Jose Published 9 months ago
Flexible on stack
Etched

Join Etched as a DFT Intern to refine DFT flow automation and contribute to chip-level regression in a fast-paced environment.

Etched San Jose Published 6 months ago
Flexible on stack
SpaceX

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$340k/yr Published 2 months ago
Flexible on stack
SpaceX

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $220k–$355k/yr Published 2 months ago
Flexible on stack