"rtl" Jobs

158 open tech roles matching “rtl”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, SystemVerilog, ASIC. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 158 results

Architecture Modeling Engineer

Join Mythic as an Architecture Modeling Engineer to develop designs for next-generation AI processors.

Mythic Austin, TX $120k–$225k/yr Published 1 year ago

AI/ML

Apply →

Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Irvine, CA $145k–$175k/yr Published 5 months ago

FinFET RTL Makefile ASIC Python

Apply →

Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Austin, TX Published 4 months ago

FinFET EDA RTL Makefile ASIC

Apply →

Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Palo Alto, CA $155k–$185k/yr Published 4 months ago

FinFET EDA Makefile ASIC Python

Apply →

Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 5 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Apply →

Product Line Director, Frontend RCA & Coverage

Lead the digital front-end verification vertical at ChipAgents, driving AI-driven RCA and coverage products from problem definition to sales.

ChipAgents San Jose $180k–$450k/yr Published 2 months ago

formal verification lint CDC AI/ML coverage

Apply →

Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 5 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Apply →

Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Palo Alto, CA, United States $135k–$175k/yr Published 1 day ago

FinFET bash ASIC Python Perl

Flexible on stack

Apply →

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

Apply →

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $210k–$310k/yr Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

Apply →

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$300k/yr Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

Apply →

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $210k–$300k/yr Published 3 months ago

FPGA ASIC VMM Python UVM

Flexible on stack

Apply →

Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Austin, TX, United States Published 1 day ago

FinFET bash ASIC Python Perl

Flexible on stack

Apply →

Senior DDR & Execution Validation Engineer

Join Graphcore as a Senior DDR & Execution Validation Engineer to validate advanced memory subsystems for next-gen AI compute platforms.

Graphcore Bengaluru, India Published 2 months ago

C++ Oscilloscopes UART HBM GPIO

Flexible on stack

Apply →

Senior NVM Digital Designer

Join Mythic as a Senior Digital Designer to develop next-gen NVM controllers for analog compute-in memory technology.

Mythic Palo Alto, CA Published 3 weeks ago

Behavioral Models RTL NVM Digital Design

Apply →

Senior Design Verification Engineer

Join Mythic as a Senior Design Verification Engineer to develop and verify designs for next-generation AI processors.

Mythic Austin, TX $120k–$225k/yr Published 11 months ago

AI/ML analog technology

Apply →

Strategic Finance Manager

Lead the financial infrastructure and pricing strategy for ChipAgents, a startup at the intersection of AI and semiconductor design.

ChipAgents San Jose $150k–$200k/yr Published 2 weeks ago

AI/ML Pricing Strategy financial modeling

Apply →

Digital Verification Engineer

Join Neuralink as a Digital Verification Engineer to impact the future of brain-computer interfaces.

Neuralink South San Francisco, California, United States $131k–$243k/yr Published 1 month ago

ARM Unix Makefile Python UVM

Flexible on stack

Apply →

Senior Electrical Engineer - Space Visa

Join IonQ as a Senior Electrical Engineer to design advanced electronics for next-generation quantum sensors in space applications.

IonQ Pleasanton, California, United States $142.1k–$186.1k/yr Published 3 months ago

RF Mixed-Signal Circuit Design PCB FPGA

Flexible on stack

Apply →

FPGA Engineer Visa

Join Astranis as an FPGA Engineer to design and verify high-performance systems for advanced satellites.

Astranis San Francisco $140k–$205k/yr Published 2 years ago

RF Verilog Vivado IDE DSP DAC

Flexible on stack

Apply →