"chip level packaging" Jobs

41 open tech roles matching “chip level packaging”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, RFIC. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 41 results

SpaceX

Join SpaceX as a Sr. IC Packaging Test Engineer to develop and release production test solutions for advanced semiconductor packaging.

SpaceX Bastrop, TX Published 1 week ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects supporting U.S. National Security.

SpaceX Hawthorne, CA $140k–$205k/yr Published 1 month ago
SpaceX

Join SpaceX as a Sr. Full Chip Physical Verification Engineer to develop cutting-edge silicon for the Starlink network.

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects for Starlink's global broadband internet system.

SpaceX Palo Alto, CA $150k–$245k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects for Starlink's global broadband internet system.

SpaceX Irvine, CA $140k–$230k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. Silicon Photonics Design Engineer to develop cutting-edge photonics solutions for the Starlink network.

SpaceX Redmond, WA $165k–$270k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Layout Designer to work on advanced silicon projects for Starlink's global broadband internet system.

SpaceX Redmond, WA $140k–$235k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. High-Speed Electro-Optical IC Engineer to develop cutting-edge solutions for the Starlink network.

SpaceX Redmond, WA $165k–$270k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Palo Alto, CA $170k–$230k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $175k–$280k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $165k–$265k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $135k–$185k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Redmond, WA $165k–$270k/yr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RF Front-End Module Design Engineer to develop advanced RF modules for the Starlink Mobile network.

SpaceX Sunnyvale, CA $170k–$235k/yr Published 3 months ago
Flexible on stack