"rtl development" Jobs

Join a startup focused on reinventing chip design with a hands-on role in RTL and design verification.

Join Ricursive Intelligence as a DFT Engineer to shape the future of chip design with AI-driven methodologies.

Join Ricursive Intelligence as a Software Engineer to build scalable systems for chip design using AI-driven methods.

Explore opportunities at Ricursive Intelligence, a frontier AI Lab focused on self-improving systems and chip design.

Join Etched as an RTL Engineer to ensure AI chips operate efficiently in a fast-paced, innovative environment.

Join Etched as a Design Verification Engineer to ensure high-performance custom IPs for cutting-edge AI hardware.

Join Etched as a Design Verification Engineer to ensure high-performance custom IPs for cutting-edge AI hardware.

Lead the digital front-end verification vertical at ChipAgents, driving AI-driven RCA and coverage products from problem definition to sales.

Join Etched as a Physical Design intern to work on front-end designs in silicon and improve iteration speed to final signoff.

Join Neuralink as a Digital IC Design Engineer to innovate in brain-computer interface technology with a talented team.

Join Etched as a Physical Design Engineer to architect cutting-edge PD flows for AI hardware in a fast-paced startup environment.

Join Anthropic as a Research Engineer to advance AI models' silicon design capabilities within a hybrid work environment.

Join Ambiq as a Principal RTL Engineer to drive architecture and RTL development for next-generation silicon in a dynamic team.

Join Etched as an Emulation Engineer to own HAPS bring-up and support firmware and software engineers in a cutting-edge AI hardware startup.

Join Graphcore as a Senior DDR & Execution Validation Engineer to validate advanced memory subsystems for next-gen AI compute platforms.

Join Etched as a Formal Verification Engineer to drive verification strategies for complex ASIC designs in a fast-paced startup environment.

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

Join Mythic as a Sr DFT Engineer to implement DFT features on innovative chips in a fast-paced startup environment.