"rtl" Jobs - Joblaze

Showing 20 of 22 results

Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Sunnyvale, CA $170k–$235k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 2 months ago

Verilog AHB ASIC Python System Verilog

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3D Physical Design Engineer

Cerebras Systems Sunnyvale, CA $150k–$270k/yr Published 1 year ago

AI/ML Calibre ICV Python TCL

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Sunnyvale, CA $170k–$240k/yr Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$230k/yr Published 1 week ago

VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$230k/yr Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Sunnyvale, CA $170k–$230k/yr Published 1 week ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 1 week ago

FinFET Scripting ASIC EDA tools physical design

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 1 week ago

FinFET bash ASIC Python Perl

Flexible on stack

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AI Silicon Physical Design Engineer

Cerebras Systems Remote, California, United States; Sunnyvale, CA $150k–$250k/yr Published 1 year ago

Design Compiler ICC2 AI/ML Calibre ICV

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Sr. ASIC Design Engineer (Starshield)

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 2 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Palo Alto, CA $170k–$235k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. FPGA Engineer (Starshield) Visa

SpaceX Hawthorne, CA $160k–$225k/yr Published 3 months ago

C++ Verilog DSP FPGA SystemVerilog

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Sr. Manager, RF Silicon Development (Starshield) Visa

Lead the RF Silicon Development team at SpaceX, focusing on advanced RFICs for national security applications.

SpaceX Hawthorne, CA $220k–$290k/yr Published 3 days ago

GaAs GaN Verilog Network Analyzers Vector Signal Analyzers

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Sr. ASIC Design Verification Engineer (Starshield) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Sr. ASIC Design Verification Engineer (Starshield) Visa

SpaceX Palo Alto, CA $170k–$235k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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