Systemverilog Jobs in San Jose

Join Etched as a Silicon Validation Engineer to develop firmware for AI/ML accelerator ASICs in a hands-on, onsite role.

Join Etched as a DFT Intern to refine DFT flow automation and contribute to chip-level regression in a fast-paced environment.

Join Etched as an Applied AI Engineer to enhance chip development using AI agents in a hands-on, onsite role.

Join Etched as a Design Verification Engineer to ensure high-performance custom IPs for cutting-edge AI hardware.

Join Etched as an Emulation Engineer to own HAPS bring-up and support firmware and software engineers in a cutting-edge AI hardware startup.

Join Etched as an ASIC Architect to design next-generation AI accelerators with a focus on performance and efficiency.

Join Etched as a Design Verification intern to validate custom IPs for cutting-edge AI hardware in a collaborative environment.

Join Etched as an RTL Intern to design microarchitecture and implement logic in Verilog while working on cutting-edge machine learning architectures.

Join Etched as a Design Verification Engineer to tackle complex verification challenges in a fast-paced startup environment.

Join Etched as a Physical Design intern to work on front-end designs in silicon and improve iteration speed to final signoff.

Join Etched as a Formal Verification Engineer to drive verification strategies for complex ASIC designs in a fast-paced startup environment.

Join Etched as a Design Verification Engineer to ensure high-performance custom IPs for cutting-edge AI hardware.

Join ChipAgents as an Applications Engineer to guide enterprise customers in deploying AI-driven chip design solutions.