joblaze

Direct from source · No middlemen

Verilog Jobs in United States

42 open positions · Updated 2 hours ago

Average salary (USD/year): 156k–242.5k/yr

42 roles Mid 11, Senior 11, Intern 8, Principal 6, Staff 4, Lead 2 0–20 yrs experience Austin, TX +16 more Full-time, Internship newest 2 hours ago

Also hiring: SystemVerilog Python C++ TCL C FPGA

42 Verilog roles across 10 companies, most in Other; 2% fully remote; typical advertised salary $155k

Who is hiring (10 companies)

SpaceX (18) Ambiq (6) Astranis (6) Etched (4) K2 Space (2)

Role types

Other (37) AI/ML (2) Design (2) Management (1)

Work arrangement: 1 fully remote · 10 on-site · 31 not stated

Advertised salaries: p25 $125k · median $155k · p75 $176.3k (from 20 disclosed annual salaries, USD)

Counts are open roles Joblaze currently tracks on company career pages for this exact skill/location; salaries are advertised minimums, annual, converted to USD.

Showing 20 of 42 positions

Search with filters →

Senior FPGA Prototyping Engineer Remote

Join K2 Space as a Senior FPGA Prototyping Engineer to drive the development of next-generation communications ASICs in a fully remote role.

K2 Space United States $120k–$225k/yr Published 3 hours ago

Verilog UART JTAG FPGA GPIO

Flexible on stack

Apply →

Principal SoC RTL Engineer

Join Ambiq as a Principal RTL Engineer to drive architecture and RTL development for next-generation silicon.

Ambiq Austin, Texas, United States Published 1 week ago

Verilog SystemVerilog

Apply →

Forward Deployed Engineer

Join ChipAgents as a Forward Deployed Engineer to build software solutions in chip design and verification with leading semiconductor companies.

ChipAgents San Jose $180k–$300k/yr Published 1 week ago

TypeScript C++ Verilog RTL Python

Flexible on stack

Apply →

Sr. FPGA Design Engineer

Join Reliable Robotics as a Sr. FPGA Design Engineer to enhance aviation safety through innovative technology.

Reliable Robotics Corporation Mountain View, CA Published 2 weeks ago

Verilog SystemVerilog VHDL

Apply →

FPGA Engineer (Starshield)

Design and develop FPGAs for SpaceX's satellite constellation, focusing on safety-critical logic and communications systems.

SpaceX Hawthorne, CA $125k–$195k/yr Published 4 weeks ago

C++ Verilog C Xilinx SoC FPGA Python

Flexible on stack

Apply →

DFT Engineer

Join Ricursive Intelligence as a DFT Engineer to shape the future of chip design with AI-driven methodologies.

Ricursive Intelligence Palo Alto Published 4 weeks ago

IJTAG Verilog DFT Python TCL

Flexible on stack

Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 1 month ago

Verilog ASIC Python System Verilog SoC

Apply →

ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC Design Engineer to develop cutting-edge FPGAs and ASICs for the Starlink broadband internet system.

SpaceX Palo Alto, CA $135k–$175k/yr Published 1 month ago

C++ Xilinx Vivado Verilog C DSP

Flexible on stack

Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

SpaceX Irvine, CA $165k–$265k/yr Published 1 month ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 1 month ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$270k/yr Published 1 month ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

Apply →

FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 1 month ago

C++ Xilinx Vivado Verilog C DSP

Flexible on stack

Apply →

FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 1 month ago

C++ Xilinx Vivado Verilog C DSP

Flexible on stack

Apply →

FPGA Associate (Summer 2027)

Join Astranis as an FPGA Associate to work on hardware development for advanced satellite systems.

Astranis San Francisco $1.9k–$1.9k/wk Published 1 month ago

Verilog Xilinx Vivado FPGA UVM

Flexible on stack

Apply →

FPGA Intern (Winter 2027)

Join Astranis as an FPGA Intern to work on hardware development for advanced satellite technology.

Astranis San Francisco $29–$29/hr Published 1 month ago

Verilog Xilinx Vivado FPGA UVM

Flexible on stack

Apply →

FPGA Intern (Summer 2027) Visa

Join Astranis as an FPGA Intern to work on hardware development for advanced satellite technology.

Astranis San Francisco $29–$29/hr Published 1 month ago

Verilog Vivado IDE Xilinx FPGA UVM

Flexible on stack

Apply →

FPGA Associate (Winter 2027)

Join Astranis as an FPGA Associate to work on hardware development for advanced satellite technology.

Astranis San Francisco $1.9k–$1.9k/wk Published 1 month ago

Verilog Vivado IDE Xilinx FPGA TCL

Flexible on stack

Apply →

Intern, Software Engineering, 2027 Visa

Join Cowboy Space Corporation as a Software Engineering Intern to tackle complex technical challenges in space-based solar energy.

Cowboy Space Corporation San Carlos, California $1.8k–$1.8k/wk Published 1 month ago

C++ Verilog C F Prime cFS

Flexible on stack

Apply →

Silicon Validation Engineer, Software

Join Etched as a Silicon Validation Engineer to develop firmware for AI/ML accelerator ASICs in a hands-on, onsite role.

Etched San Jose Published 2 months ago

C++ Verilog C CI/CD JTAG

Flexible on stack

Apply →

Emulation Engineer, Hardware Prototyping (HAPS)

Join Etched as an Emulation Engineer to own HAPS bring-up and support firmware and software engineers in a cutting-edge AI hardware startup.

Etched San Jose $150k–$275k/yr Published 5 months ago

C++ Protium Verilog SimVision palladium

Flexible on stack

Apply →

Page 1 of 3 Next →