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Verilog Jobs in United States

42 open positions · Updated 1 month ago

Average salary (USD/year): 156k–242.5k/yr
42 roles Mid 11, Senior 11, Intern 8, Principal 6, Staff 4, Lead 2 0–20 yrs experience Austin, TX +16 more Full-time, Internship newest 1 hour ago

42 Verilog roles across 10 companies, most in Other; 2% fully remote; typical advertised salary $155k

Work arrangement: 1 fully remote · 10 on-site · 31 not stated

Advertised salaries: p25 $125k · median $155k · p75 $176.3k (from 20 disclosed annual salaries, USD)

Counts are open roles Joblaze currently tracks on company career pages for this exact skill/location; salaries are advertised minimums, annual, converted to USD.

Showing 20 of 42 positions

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Etched

Join Etched as an ASIC Architect to design next-generation AI accelerators with a focus on performance and efficiency.

Etched San Jose Published 1 year ago
Flexible on stack Heavy meetings
Etched

Join Etched as a DFT Intern to refine DFT flow automation and contribute to chip-level regression in a fast-paced environment.

Etched San Jose Published 7 months ago
Flexible on stack
Reliable Robotics Corporation

Lead and grow the FPGA team responsible for developing complex electronic hardware for air-to-air radar systems.

Reliable Robotics Corporation Seattle, WA Published 3 weeks ago
Astranis

Join Astranis as a Senior FPGA Engineer to design and verify RTL for advanced satellite systems.

Astranis San Francisco $175k–$240k/yr Published 2 years ago
Flexible on stack
Neuralink

Join Neuralink as an Electrical Engineer to design and oversee custom electronics systems for innovative healthcare solutions.

Neuralink Austin, Texas, United States; South San Francisco, California, United States $105k–$175.5k/yr Published 5 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior FPGA Prototyping Engineer to drive the development of next-gen communications ASICs in a fast-paced environment.

K2 Space United States - Remote $120k–$225k/yr Published 3 months ago
Flexible on stack
Ambiq

Join Ambiq as a Staff Engineer to verify digital and mixed-signal designs for low-power semiconductor solutions.

Ambiq Singapore Published 4 months ago
Flexible on stack
Ambiq

Join Ambiq as a Sr. Staff Engineer to lead digital design verification for cutting-edge low-power semiconductor solutions.

Ambiq Austin, Texas, United States Published 2 months ago
Flexible on stack
Ambiq

Join Ambiq as a Sr. Staff Engineer to lead digital design verification for cutting-edge low-power semiconductor solutions.

Ambiq Austin, Texas, United States Published 5 months ago
Flexible on stack
Ambiq

Join Ambiq as a Senior Staff SoC RTL Engineer to design and deliver ultra-low-power semiconductor solutions.

Ambiq Austin, Texas, United States Published 3 months ago
Flexible on stack 70% coding
Ambiq

Join Ambiq as a Principal RTL Engineer to drive architecture and RTL development for next-generation silicon in a dynamic team.

Ambiq Austin, Texas, United States Published 7 months ago
Astranis

Join Astranis as an FPGA Engineer to design and verify high-performance systems for advanced satellites.

Astranis San Francisco $140k–$205k/yr Published 2 years ago
Flexible on stack
SpaceX

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $135k–$175k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a silicon engineering intern to work on custom silicon and hardware for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a silicon engineering intern to work on cutting-edge chip design and development for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$340k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $220k–$355k/yr Published 3 months ago
Flexible on stack
SpaceX

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 3 months ago
Flexible on stack